Asynchronous Design
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Asynchronous Signaling Protocol

Most of the asynchronous communication/signaling schemes are based on some sort of protocol involving requests, which are used to initiate an action, and corresponding acknowledgements, indicating the response to the request. These handshake signals are concerned with only the local temporal relationships between the adjacent subsystems sharing common interfaces with them.

This sort of communication model is well explained with the concept of sender-receiver pair of information/data exchanging units. For example, let there be two modules, a sender A and a receiver B. A request is sent from A to B to indicate that A is requesting some action by B. When B has either completed or stored the request, it acknowledges the request by asserting the acknowledge signal, which is sent from B to A. This concept can be extended to interfaces shared by more than two subsystems.

 

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Four-Phase Signaling Protocol

This is one of the popular two pervasive choices among the asynchronous design community. This four-phase protocol is also called with other names like 4-cycle, RZ (return to zero), and level signaling protocol. This protocol can be better explained with the diagram below.

Though the diagram shows a periodic waveform between request & acknowledgement, that need not be the case in any asynchronous system. (Remember, asynchronous systems do not assume that time is discrete). Hence there is no implicit assumption about the delay between successive events. Note that in this protocol there are typically 4 transitions 2 on the request and 2 on the acknowledge, required to complete a particular event transaction. In the above diagram request is always sent by the sender A and acknowledge is sent by receiver B. Rest of the protocol is implicit in the waveform.

 

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Two-Phase Signaling Protocol

This is the other common protocol. This protocol is also named as 2-cycle and NRZ (non-return to zero) protocol. Yet again a diagram can better describe a protocol. 

Well....  you could be wondering that both the waveforms look very similar, but it is not so, there is a very significant difference. Look at the pointers indicating the start and completion of events, they show the difference. Here every transition on the request line falling and rising, indicates a start of new event (request). The same is true for the transitions on the request on acknowledge line. As pointed out by Ivan Sutherland... one of the pioneers in asynchronous design, this protocol is useful for high-speed micropipelines.

 

Arguments between both signaling protocols

There are quite interesting arguments/ comments about both the protocols.

Proponents of 4-phase protocol argue that 4-phase circuits are smaller than the 2-phase circuits and the time required for the falling transition on the request line doesn't usually cause a performance degradation. This is because falling transitions can take place in parallel with other circuit operations (hidden by overlapping with other system operations), or can be used to transfer the result of the receiver back to the requestor.

2-phase proponents argue that 2-phase signaling is better from both a power and a performance standpoint, since every transition represents a meaningful event and no transitions or power are consumed in return to zero since there is no resetting of handshake link (means, falling transition on the request/acknowledge lines in the 4-phase protocol is a state of resetting the handshake link between the subsystems). In principle this is true. It is also a case that 2-phase protocol implementation has an area overhead due to the fact that it requires more logic than its 4-phase equivalent. Again increased logic complexity could consume more power than is saved by  the control transitions.

Due to argument that 4-phase protocol has a resetting action that could potentially have some time impact (though its proponents jab this down right away), this gave rise to another approach, called "early acknowledge". In this case, receiver latches the incoming request prior to acting on it. This results in a pipeline implementation very similar to that of synchronous systems.

Certain designs show that both protocols coexist in the same system, albeit on different interfaces. This only means that both have corresponding advantages and disadvantages over the other in particular circuits.

 

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Last Updated on 22nd Dec 2001

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