VHDL - Douglas L. Perry

HDLPlanet's Review (Harish Y S)

This book does start with the basics required like VHDL constructs, behavioral modeling, sequential processing, etc., but as the author by himself says, "this book was written to help hardware design engineers to better model their designs". However, I personally don't feel that the book is quite succinct for the beginners and doesn't go to abstracts in the introductory sections. Coding style used in the examples isn't upto the mark. Design techniques used in the vending machine example aren't the best. The positive aspects of the book are a couple of chapters on synthesis which definitely give the beginner some idea of synthesis aspects in digital system design. Overall, beginners can go for this book at the graduate course level.

HDLPlanet's Review (Harish Y S)

This is one of the best books available on VHDL. This book targets beginners in VHDL and engineers who have very less or no experience in programming. This introduces the idea of hardware description language and delineates all the set down reasons for its use and the benefits that ensue. Further, all VHDL constructs used for hardware modeling are covered in detail. Also it covers some advanced modeling features like resolved signals, configuration, generics & parameterizing the behavior and structure of a design, with good case studies. Also the appendix covers basic synthesis aspects. One advantage in this book is the use of very good examples. I strongly suggest this book for beginners.

HDLPlanet's Review (Harish Y S)

This is one other good book, but I have seen everyone who has read this book giving a different opinion about this. Anyway as I would see, anyone with prior knowledge of VHDL atleast the introduction and able to write some code on his own will definitely appreciate this book. At certain points the authors goes deep into the topic (simulation, delays etc...) and that could cause some inconvenience to beginners but I appreciate these because this is the first book covering those topics in depth that I have come across. This has got an entire design example (Parwan CPU), which I really appreciate. Apart from all modeling aspects this also has an appendix for VHDL synthesis subset. I suggest having slight prior knowledge in VHDL before going for this book.

HDLPlanet's Review (Harish Y S)

This is one of the most recent books that I finished reading. As the book title says, this is not a book for learning, instead this aims at addressing the most frequently asked & quite interesting questions in VHDL, synthesis, simulation and VHDL verification. I am not laying it on thick if I say that this book addresses several questions which have never been addressed in many other most popular books. The author is very active in the news groups and hence he keeps track of the interesting issues that come up in the groups and all those are addressed here with exceptionally good and concise solutions. I strongly suggest this book for every student and engineer, but after some experience with VHDL. Also the way the author has presented makes me say he's the best author I have come across.

HDLPlanet's Review (Harish Y S)

This is another good book that explains all the basic language aspects of both VHDL & Verilog. Beginners can definitely choose this book because it describes the concepts involved with good amount of examples. This book explains all the concepts in parallel with both VHDL & Verilog. In all this covers the language aspects, simulation and synthesis aspects along with modeling issues, techniques and recommendations. I strongly suggest this book for bridging between VHDL & Verilog, in the sense that those who are moving from either VHDL to Verilog or from Verilog to VHDL will definitely appreciate this book.

HDLPlanet's Review (Harish Y S)

This is the only specialized Verilog book I have read so far. This is an excellent book covering all the basics of Verilog, different modeling aspects (behavioral, data-flow, gate-level and switch-level). This also covers timing and delay aspects very well. PLI being an important part of Verilog is also addressed in a good way. Author also successfully accounts for the logic synthesis and verification aspects in Verilog. This also has two good examples of synthesizable FIFO &  behavioral DRAM models. I suggest this book for beginners in Verilog and for me this book seems to be complete.

Last Updated on 24th Feb 2002